While monolithic packaging will remain the mainstay of most semiconductor products for years to come, the field of High-Performance Computing is quickly adopting Heterogenous Integration strategies to leverage chiplet configurations. Initial products have been deployed in 2D configurations however continuing miniaturization and performance requirements will help drive 3D technologies, minimizing latency and maximizing IO density.
3D stacking technology will enable Beyond Moore’s Law Scaling and enable complex heterogeneous integration schemes with unprecedented IO Density, Functionality and Performance.